1. Field of the Invention
This invention relates to a semiconductor device and method for manufacturing the semiconductor device, and more particularly to a semiconductor device having an isolation of an STI and its manufacturing method.
2. Related Background Art
For the purpose of downsizing semiconductor devices, the method of isolating elements by STI (Shallow Trench Isolation) has been used for years in lieu of the technique using selective oxidation for isolating elements. STI is a technique for electrically isolating device regions for forming devices from other regions in a semiconductor device by providing shallow trenches. In STI, trenches are formed in device isolating regions instead of using selective oxidation thereof.
FIG. 4 is an enlarged cross-sectional view of a semiconductor device 400 having conventional STI made by a process of its manufacturing. A gate-insulating film 20 is formed on a top surface of a semiconductor substrate 10. A gate electrode 30 of an amorphous silicon film overlies the gate-insulating film 20. A silicon nitride film 40 is deposited on the gate electrode 30. A silicon oxide film 50 is deposited on the silicon nitride film 40.
The silicon nitride film 40 and the silicon oxide film 50 are selectively etched off to obtain a predetermined pattern by using a photolithography technique. After that, using the silicon oxide film 50 as a mask, the gate electrode 30, the gate-insulating film 20 and the semiconductor substrate 10 are selectively removed by etching. By this etching, the trench 60 is formed to reach the semiconductor substrate 10.
Subsequently, the side and bottom surface portions of the trench 60 are oxidized by an RTO (rapid thermal oxidation) in an oxygen O2 atmosphere heated to 1000° C. In FIG. 4, the trench 60 and its surrounding structure after the RTO treatment are shown in an enlarged scale.
On the side surface and the bottom surface of the trench 60, a silicon oxide film 70 is formed by the RTO. The silicon oxide film 70 protects the surface of the semiconductor substrate 10, etc. from the air.
When the trench 60 is oxidized in the oxygen O2 atmosphere, the diffusion coefficient of an oxidation seed diffusing into silicon single crystal is smaller than that of an oxidation seed diffusing into amorphous silicon. Stresses rise in the periphery of the boundary portions (e.g. sides, edges and corners) between the side surface and the bottom surface of the trench 60 during the oxidation progress. The diffusion coefficient of an oxidation seed on the periphery of the boundary portions, where a relatively large stress rises, is smaller than that of an oxidation seed on the flat surface portions, where a relatively small stress rises. In general, a gas including fluorocarbon (e.g. CF4, C3F8, and so on) is often used in RIE process.
Therefore, the boundary portions 80, which are provided at the bottom portion of the trench 60 of the semiconductor device 400, are more difficult to be oxidized than the flat surface portions inside the trench 60. Thus, the oxide film becomes thinner and thinner toward the boundary portions 80. Further, the oxide film provided on the boundary portions 80 is thinner than the oxide film provided on their flat surfaces. As a result, the boundary portions 80 are sharpened, and have curved surfaces, each of which has a small curvature radius.
The sharper the boundary portions 80 and the smaller the curvature radius of the curved surface in the boundary portions 80 becomes, as shown in FIG. 2A, the larger the stress becomes therein. The stress which rises in the boundary portions 80 includes not only the stress concentrated by the oxidation, but also includes the stress from an amorphous silicon, a silicon nitride film and a silicon oxide film which are deposited on the semiconductor substrate 10.
As shown in FIG. 2A, the stress concentration in the boundary portions 80 of the trench 60 easily causes crystal defects 91 in the boundary portions 80. The crystal defects 91 cause, e.g., a leakage of the carrier, therefore the crystal defects 91 interfere with the normal operations of the semiconductor devices. As a result, they cause a lower yield of the semiconductor devices.